The present invention relates to a technique of stabilizing a gate-voltage control type power semiconductor element, such as an insulated gate bipolar transistor (hereinafter, referred to as IGBT) and a vertical power MOSFET, in an overcurrent limiting.
Hereinafter, an overcurrent limiting of an IGBT will be discussed, as an example.
FIG. 16 shows an equivalent circuit of a semiconductor device 100P consisting of an IGBT 1P and its overcurrent limiting circuit 10P, as an example of the background art. In an emitter region of the IGBT 1P of this figure, a plurality of emitter cells are connected in parallel in order to pass a predetermined emitter current (main current) i. Further, the IGBT 1P incorporates a current detecting element (current sense portion) for detecting the emitter current i as well as a main portion, and outputs a current sense current is from a current sense terminal S connected to the current detecting element. Reference characters G, C and E represent a gate terminal, a collector terminal and an emitter terminal of the IGBT 1P, respectively.
Though a planar gate type IGBT which is obtained by microfabrication and a trench gate type IGBT have been developed as a high-performance IGBT in recent years, these IGBTs each have a number of channel regions per unit area and supposing a load short circuit state occurs, very large main current flows to increase energy loss, causing significant characteristic deterioration of the element. For this reason, in the IGBT, it is necessary to limit the main current by monitoring the current sense current is and lowering a gate voltage when an overcurrent flows. A monitoring circuit used for this purpose is the overcurrent limiting circuit.
In FIG. 16, the overcurrent limiting circuit 10P having a general configuration is shown. When a voltage between the current sense terminal S and the emitter terminal E, which is the product of the current sense current is similar to the emitter current i and the resistance value RS of a sense resistor 3P becomes equal to or higher than the threshold voltage of a current limiting n-type MOSFET 2P, the MOSFET 2P is turned on and electric charges accumulated in a gate region of the IGBT 1P is bypassed, to lower the gate voltage of the IGBT 1P and bring the IGBT 1P into an OFF state, thereby suppressing an increase in main current i. Further, this circuit 10P has an advantage of changing an overcurrent detection level by changing the resistance value RS of the sense resistor 3P and the threshold voltage of the MOSFET 2P.
Furthermore, when a reverse bias is applied across the gate and emitter of the IGBT 1P, as shown in FIG. 17, the reverse bias is sustained by providing a diode 8P between the gate terminal G of the IGBT 1P and a drain of the MOSFET 2P.
Further, though the n-type MOSFET 2P is used as a current limiting transistor in FIGS. 16 and 17, a bipolar transistor may be used instead to produce the same effect.
The overcurrent limiting circuit 10P can achieve a stable overcurrent limiting when the emitter current i and the current sense current is show the same behavior even in a transient state.
On the transition of turnon and turnoff in a switching operation of the IGBT, however, there is a case where these currents i and is do not show the same behavior due to various factors. For example, there are cases (1) where the threshold voltage (Vthm) of the main portion and the threshold voltage (Vths) of the current sense portion are different from each other for internally structural reason of the IGBT and the relation Vthm greater than Vths is hold and (2) where the time constant which is defined by an internal gate resistance (Rgm) and a gate capacitance (Cm) of the main portion and the time constant which is defined by an internal gate resistance (Rgs) and a gate capacitance (Cs) of the current sense portion hold the relation (Rgmxc3x97Cm) less than (Rgsxc3x97Cs) for designing reason. Then, in such cases (1) and (2), it is reported that there is a case where the attenuation of the current sense current is becomes slower than that of the main current i at the turnoff and the current sense current is momentarily increases (see xe2x80x9cAnalysis and Suppressing Method of Transient Peak Current In Current Detecting Unit Cell of IGBT With Current Sensexe2x80x9d, The Transactions of the Institute of Electrical Engineers of Japan. C, Vol. 115, No. 1).
In such a case, the overcurrent limiting circuit 10P illustrated in FIGS. 16 and 17 early becomes not able to perform the stable overcurrent suppressing function. Specifically, when the current sense current is momentarily increases due to the factors (1),(2) and the like, since the voltage which is the product of the current is flowing in the current sense portion and the resistance value RS of the sense resistor 3P rises to be over the voltage at the time when these currents i and is show the same behavior even in the load short circuit state, a voltage applied to the gate electrode of the current limiting MOSFET 2P becomes higher and the energizing capability of the MOSFET 2P becomes much higher than necessary. For this reason, the speed of lowering the gate voltage of the IGBT 1P becomes faster. When the speed of lowering the gate voltage becomes faster thus, the turnoff speed of the IGBT 1P becomes faster, and as a result, a surge voltage which is defined by a circuit inductance and the rate of change in current at the turnoff becomes higher and therefore there may be a case where the surge voltage exceeds the element breakdown voltage, depending on conditions.
These problems rise both in cases where the bipolar transistor is used as a current limiting transistor instead of the MOSFET 2P and where a vertical power MOSFET is used as a power semiconductor element.
The present invention is intended to solve the above problems, and an object of the present invention is to always achieve a stable overcurrent limiting operation without raising a turnoff speed of a power semiconductor element in an overcurrent limiting under any condition and in any state.
The present invention is directed to an overcurrent limiting circuit. According to a first aspect of the present invention, the overcurrent limiting circuit of a power semiconductor element which has first and second regions for passing a main current, a third region for controlling the main current which flows from the first region towards the second region, a current detecting region for passing a current sense current from the second region, and a first electrode terminal, a second electrode terminal, a third electrode terminal and a current sense terminal connected to the first region, the second region, the third region and the current detecting region, respectively, comprises: a resistor connected between the second electrode terminal and the current sense terminal; a transistor comprising a first main electrode, a second main electrode and a main control electrode connected to the third electrode terminal, the second electrode terminal and the current sense terminal, respectively, which comes into an ON state to pass a current from the first main electrode towards the second main electrode when a voltage not lower than a first control voltage is applied to the main control electrode; and a voltage clamping circuit connected between the main control electrode and the second main electrode of the transistor, for clamping a voltage applied to the main control electrode to a second control voltage not lower than the first control voltage when a voltage which is the product of the current sense current and the value of the resistor becomes a predetermined value not lower than the first control voltage.
According to a second aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the voltage clamping circuit comprises a diode having a first electrode and a second electrode connected to the main control electrode and the second main electrode of the transistor, respectively, which comes into an ON state to pass a current from the first electrode towards the second electrode when the voltage which is the product of the current sense current and the value of the resistor becomes the predetermined value, and the second control voltage is defined on the basis of a voltage between the first electrode and the second electrode and not lower than the first control voltage.
According to a third aspect of the present invention, in the overcurrent limiting circuit of the second aspect, the diode is so connected as to be biased in the forward direction.
According to a fourth aspect of the present invention, in the overcurrent limiting circuit of the third aspect, the diode is a PN-junction diode.
According to a fifth aspect of the present invention, in the overcurrent limiting circuit of the second aspect, the diode is so connected as to be biased in the reverse direction.
According to a sixth aspect of the present invention, in the overcurrent limiting circuit of the third aspect, the diode is a PN-junction diode.
According to a seventh aspect of the present invention, in the overcurrent limiting circuit of the third aspect, the diode is a Schottky-barrier diode.
According to an eighth aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the transistor is defined as a first transistor, the resistor comprises a first resistor having one end connected to the current sense terminal; and a second resistor having one end connected to the other end of the first resistor and the other end connected to the second electrode terminal, the voltage clamping circuit comprises a second transistor having a first electrode, a second electrode and a control electrode connected to the main control electrode and the second main electrode of the transistor and the other end of the first resistor, respectively, which comes into an ON state to pass a current from the first electrode towards the second electrode when the voltage which is the product of the current sense current and the value of the resistor becomes the predetermined value, a voltage between the first electrode and the second electrode of the second transistor in the ON state is set not lower than the first control voltage, and the second control voltage is defined on the basis of the voltage between the first electrode and the second electrode.
According to a ninth aspect of the present invention, in the overcurrent limiting circuit of the eighth aspect, the second transistor is a MOSFET.
According to a tenth aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the second transistor is a bipolar transistor.
According to an eleventh aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the first main electrode of the transistor comprises a first electrode; and a diode having one end and the other end connected to the third electrode terminal and the first electrode, respectively, and the diode passes a current from the one end towards the other end in the forward bias.
According to a twelfth aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the transistor is a MOSFET.
According to a thirteenth aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the transistor is a bipolar transistor.
According to a fourteenth aspect of the present invention, in the overcurrent limiting circuit of the first aspect, the resistor, the transistor and the voltage clamping circuit are integrated on a semiconductor substrate.
According to a fifteenth aspect of the present invention, the overcurrent limiting circuit of the first aspect is included in a semiconductor device having the power semiconductor element.
According to a sixteenth aspect of the present invention, the overcurrent limiting circuit of a power semiconductor element which has first and second regions for passing a main current, a third region for controlling the main current which flows from the first region towards the second region, a current detecting region for passing a current sense current from the second region, and a first electrode terminal, a second electrode terminal, a third electrode terminal and a current sense terminal connected to the first region, the second region, the third region and the current detecting region, respectively, comprises: a resistor connected between the second electrode terminal and the current sense terminal; a transistor comprising a first main electrode, a second main electrode and a main control electrode connected to the third electrode terminal, the second electrode terminal and the current sense terminal, respectively, which comes into an ON state to pass a current from the first main electrode towards the second main electrode when a voltage not lower than a first control voltage is applied to the main control electrode; and voltage clamping means connected between the main control electrode and the second main electrode of the transistor, for clamping the voltage applied to the main control electrode to a second control voltage not lower than the first control voltage when a voltage which is the product of the current sense current and the value of the resistor becomes a predetermined value not lower than the first control voltage.
The present invention is also directed to a semiconductor device. According to a seventeenth aspect of the present invention, the semiconductor device comprises: a power semiconductor element having first and second regions for passing a main current, a third region for controlling the main current which flows from the first region towards the second region, a current detecting region for passing a current sense current from the second region, and a first electrode terminal, a second electrode terminal, a third electrode terminal and a current sense terminal connected to the first region, the second region, the third region and the current detecting region, respectively; a resistor connected between the second electrode terminal and the current sense terminal; a transistor comprising a first main electrode, a second main electrode and a main control electrode connected to the third electrode terminal, the second electrode terminal and the current sense terminal, respectively, which comes into an ON state to pass a current from the first main electrode towards the second main electrode when a voltage not lower than a first control voltage is applied to the main control electrode; and a voltage clamping circuit connected between the main control electrode and the second main electrode of the transistor, for clamping a voltage applied to the main control electrode to a second control voltage not lower than the first control voltage when a voltage which is the product of the current sense current and the value of the resistor becomes a predetermined value not lower than the first control voltage.
In the overcurrent limiting circuit of the first to seventeenth aspects of the present invention, when the current sense current increases and the voltage which is the product of the current sense current and the value of the resistor reaches the voltage value not lower than the first control voltage, the voltage applied to the main control electrode of the transistor is clamped to the second control voltage which corresponds to the voltage value not lower than the first control voltage and the increase in energizing capability of the transistor is suppressed, and as a result, the speed or rate of lowering the control voltage applied to the third electrode terminal of the power semiconductor element is limited to a constant vale and does not become faster. Therefore, in the load short circuit state, even when the main current and the current sense current do not show the same behavior, the surge voltage of the power semiconductor element at the turnoff is nevertheless suppressed and a stable overcurrent limiting operation can be always achieved.
In the overcurrent limiting circuit of the third and fourth aspects of the present invention, particularly, since the first control voltage of the transistor and the forward voltage of the diode have the same temperature dependency, a much stabler overcurrent limiting operation can be achieved against temperature change.